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Last Replay1 shipped....
Sun, 17 Feb 2019
MikeJ
The final complete R1 & 68060 DB to ship Well, actually the last (I thought) Replay1 shipped years ago, but I've had one sitting around which failed production test. When a core boots up, the ini file for that core tells the software which files to upload into the FPGA, and optionally these can be read back to verify everything is...
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Gyruss reverse engineering
Tue, 12 Feb 2019
MikeJ
Here at FPGAArcade we've always tried to reproduce retro hardware for preservation as accurately as possible. When I did the first Pacman design years ago it was quite easy as there were only a few custom ICs. I built some analysis hardware you can find way back in the news here to compare the ASIC with my CPLD clone on...
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Replay2 proto-board arrived
Mon, 11 Feb 2019
MikeJ
We've bought a number of Ultra96 boards which contain a similar FPGA to the target device on Replay2. This will kick start development, especially on the Linux side. I'm also designing a small add-on board with the video output devices we'll use on the real board. This will allow us to run up some cores and make sure we are...
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Replay2 first mock up
Fri, 8 Feb 2019
MikeJ
Very rough CAD drawing to play with IO connectors Replay2 is now in PCB design. We are using a Xilinx Ultrascale+ MPSoC device which combines a fast FPGA and a 64 bit Cortex A53 cluster. The device is built on 16nm FinFET+ logic. The processor system runs up to 1.5GHz, and will have 64bit DDR4 memory (which can be shared with...
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Replay2 .... the saga continues
Mon, 4 Feb 2019
MikeJ
So first, I must apologise for it being quiet here news-wise. The active development is mostly on Slack now, but I will try and post updates here more often. So, Replay2 stalled. The issue was the excellent price/performance of the DE10 board (used in the Mister project) which is available for $130. While add on boards are needed, the total price...
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Replay2
Wed, 8 Nov 2017
MikeJ
Over the years there has been a lot of frustration about the lack of Replay boards. The main issue was the lack of quality control on components from China which caused a lot of rework effort. In retrospect, we should probably have thrown these away and built new ones.... I've been working with some contacts and have now learned enough to...
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ALICE decap and imaged
Wed, 11 Oct 2017
MikeJ
We commissioned the decap and scanning of Alice, probably the most important custom chip in the Amiga. Thanks to John Hertell for the device, and to John McMaster for the decap and scan. Here is the image data in full :  Dropbox for analysis :   /MikeJ...
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Replay 68060 daughterboard
Mon, 11 Sept 2017
MikeJ
The layout for the Replay 68060 board is complete and has been sent for manufacture. It adds 128MB of local RAM, USB, Ethernet, RTC as well as additional Midi and LED IO connectors. The picture below is a quick mock-up to see if the components actually fit :)...
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